我想通过编程禁用硬件预取.
以下是一个相关片段:
"DPL预取和L2流预取设置也可以通过编程方式更改
下表显示了为了控制DPL和L2流预取而必须更改的IA32_MISC_ENABLE MSR中的位:
Prefetcher Type MSR (0x1A0) Bit Value
DPL (Hardware Prefetch) Bit 9 0 = Enable 1 = Disable
L2 Streamer (Adjacent Cache Line Prefetch) Bit 19 0 = Enable 1 = Disable"
我试着用http://etallen.com/msr.html，但没用.
顺便说一句，我使用的是内核2.6.18-92.el5，内核中有MSR个链接:
$ grep -i msr /boot/config-$(uname -r)
CONFIG_X86_MSR=y
...
From the Intel reference:
This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a general protection exception #GP(0) will be generated. Specifying a reserved or unimplemented MSR address in ECX will also cause a general protection exception.
...
The CPUID instruction should be used to determine whether MSRs are supported (EDX[5]=1)
before using this instruction.
So, your fault might be related to a cpu that doesn't support MSRs or using the wrong MSR address.
There are lots of examples of using the MSRs in the kernel source:
In the kernel source, for a single cpu, it demonstrates disabling prefetch for the Xeon in arch/i386/kernel/cpu/intel.c, in the function:
static void __cpuinit Intel_errata_workarounds(struct cpuinfo_x86 *c)
The rdmsr function arguments are the msr number, a pointer to the low 32 bit word, and a pointer to the high 32 bit word.
The wrmsr function arguments are the msr number, the low 32 bit word value, and the high 32 bit word value.
multi-core or smp systems have to pass the cpu struct in as the first argument:
void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);